
RISC-V and Software-Defined Vehicles
RISC-V SERIES The car that gets better after you buy it RISC-V and software-defined vehicles is where the automotive story stops being about chips […]
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Open silicon for IoT and the edge: boards, MCUs, governance and where RISC-V lands first.

RISC-V SERIES The car that gets better after you buy it RISC-V and software-defined vehicles is where the automotive story stops being about chips […]

RISC-V SERIES The car is being rebuilt around the computer RISC-V automotive is a story of good timing. Just as carmakers tear up decades […]

RISC-V SERIES The factory does not care about hype RISC-V industrial IoT is where the architecture’s least glamorous virtues become its most valuable. A […]

RISC-V SERIES The one place where “open” is a security feature RISC-V security tends to trip people over one instinct: surely open hardware is […]

RISC-V SERIES Two trends heading for the same box RISC-V 5G edge computing is where two threads running through this whole series finally meet. […]

RISC-V SERIES A robot is two computers wearing one chassis RISC-V robotics is a story about a split. A robot has to react in […]

RISC-V SERIES A camera that understands what it sees, and keeps it to itself RISC-V computer vision is where all the edge-AI pieces come […]

RISC-V SERIES The instruction that does a hundred sums at once The RISC-V vector extension has turned up in nearly every recent post in […]

RISC-V SERIES Machine learning small enough to run on a coin cell RISC-V and TinyML is edge AI taken to its logical extreme. Forget […]

RISC-V SERIES The intelligence moves to where the data is RISC-V and edge AI is where the whole series thesis comes to a head. […]

RISC-V SERIES The boring standard that makes the whole thing work RVA23 is not the sort of thing that gets a keynote, but it […]

RISC-V SERIES The busiest box in the building A RISC-V IoT gateway is where the fleet comes together. It is the box that gathers […]

RISC-V SERIES An open core deserves an open operating system RISC-V and Zephyr is one of those pairings that looks obvious once you see […]

RISC-V SERIES Two instruction sets, one board decision you have to live with The RISC-V vs Arm embedded question is not really about which […]

RISC-V SERIES The chip you learned on probably is not the one you think The ESP32 RISC-V story trips up more developers than any […]

RISC-V SERIES The chip doing the actual work in most connected things A RISC-V microcontroller is a small, cheap, self-contained computer on a single […]

RISC-V SERIES Replace is the wrong word for what is actually happening Can RISC-V replace Arm? For anyone building IoT hardware the honest answer […]

RISC-V SERIES Why the open ISA fits IoT better than anything before it RISC-V matters for IoT devices because it strips the licence and […]

RISC-V SERIES One you license, one you just use The RISC-V vs Arm question gets framed as a technology fight, and it mostly is […]

RISC-V SERIES Open ISA, closed chip: what “open” actually buys you Ask is RISC-V open source and you get a yes, a no and […]

RISC-V SERIES The architecture with no landlord So who owns RISC-V? The honest answer is nobody owns the instruction set, and for anyone buying […]

RISC-V SERIES What RISC-V is, without the hand-waving So what is RISC-V? In plain terms, it is an open, royalty-free instruction set that any […]

RISC-V SERIES The open architecture quietly rewiring the chip business RISC-V is the open instruction set architecture the whole industry has started building on, […]